One challenging task for VLSI and reconfigurable system design is the identification of the smallest number format possible to implement a given numerical algorithm guaranteeing some final accuracy while minimising area used, execution time and power. We apply affine arithmetic, an extension to interval arithmetic, to estimate the rounding error of different floating-point dot-product variants. The validity of the estimated error bounds is demonstrated using extensive simulations. We derive the analytical models for rounding errors over a wide range of parameters and show that affine arithmetic with a probabilistic bounding operator is able to provide a tighter bound compared to conventional forward error analysis. Due to the tight bounds, minimum mantissa bit width for hardware implementation can be determined and comparison of different dot-product variants is possible. Our presented models allow for an efficient design space exploration and are key to specialised code generators.

Top