Performance evaluation metrics for ring-oscillator-based temperature sensors on FPGAs: A quality factor

Performance evaluation metrics for ring-oscillator-based temperature sensors on FPGAs: A quality factor

Abstract

Due to the aggressive scaling of process technologies, ultra-logic densities on integrated circuits, and also the complexity of designs, which in turn lead to a drastic increase of power density, thermal issues have become a bottleneck in electronics designs, result in a new focus for much researches over last years. To address this issue, various dynamic thermal management (DTM) techniques have been proposed to maintain the operation of systems safe and reliable. To effectively apply DTM techniques, providing a precise and reliable network of temperature sensors is highly required to measure local temperatures and provide an accurate thermal map of the chip. While many designers have utilized ring-oscillator (RO) circuits as temperature sensors in a network for measuring the thermal distribution and predicting the thermal behavior of a field programmable gate array (FPGA), a high-level study of the temperature sensors' design space is still missing. In this paper, a novel concept of the RO-based temperature sensor based on four basic evaluation metrics is presented. We introduce four useful evaluation metrics (i.e. the area, thermal, and power overheads, and thermal map error) and some measurement methods for exploring and comparing the relative performance of different temperature sensor's designs. Then, in order to make an optimal choice based on the metrics obtained, we propose a figure of merit (FOM) to characterize the efficiency of these designs. The proposed performance evaluation metric, the quality factor (QF), is based on the overheads and measurement accuracy trade-offs between different designs of the RO-based temperature sensor. Consequently, the proposed QF metric is a quantity value representing a measure of effectiveness, efficiency, and performance of a temperature sensor network, which can help the designer to make a proper decision. Moreover, in this work, a compact and ultra-sensitive RO-based temperature sensor is presented that utilizes only 5 look-up tables (LUTs), occupies 37.5% fewer resources than the most compact sensor, and provides 2.72 times higher sensitivity than the best sensitive design. Also, in this paper, several designs of the RO-based temperature sensor are explored in a network, in terms of various sensor's configurations, RO length, and counter width, and compared with each other in order to investigate their influences on the efficiency of the sensor network. According to the QF metric and experimental results, the sensor network based on the proposed sensor has the best efficiency among other alternative designs.

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Authors
  • Rahmanikia, Navid
  • Amiri, Amirali
  • Noori, Hamid
  • Mehdipour, Farhad
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Shortfacts
Category
Journal Paper
Journal or Publication Title
INTEGRATION, the VLSI journal
ISSN
0167-9260
Page Range
pp. 81-100
Volume
57
Date
2017
Official URL
http://dx.doi.org/10.1016/j.vlsi.2016.12.007
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